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20 a maximum, rail-to-rail i/o, zero input crossover distortion amplifiers ad8505/ad8506/ad8508 rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2010 analog devices, inc. all rights reserved. features psrr: 100 db minimum cmrr: 105 db typical very low supply current: 20 a per amplifier maximum 1.8 v to 5 v single supply or 0.9 v to 2.5 v dual supply rail-to-rail input/output low noise: 45 nv/hz at 1 khz 2.5 mv offset voltage maximum very low input bias current: 1 pa typical applications pressure and position sensors remote security bio sensors ir thermometers battery-powered consumer equipment hazard detectors general description the ad8505/ad8506/ad8508 are single, dual, and quad micro- power amplifiers featuring rail-to-rail input/output swings while operating from a single 1.8 v to 5 v power supply or from dual 0.9 v to 2.5 v power supplies. using a new circuit technology, these amplifiers offer zero input crossover distortion (excellent psrr and cmrr performance) and low bias current while operating with a supply current of less than 20 a per amplifier. this amplifier family offers the lowest noise in its power class. this combination of features makes the ad8505/ad8506/ad8508 amplifiers ideal choices for battery-powered applications because they minimize errors due to power supply voltage variations over the lifetime of the battery and maintain high cmrr even for a rail- to-rail input op amp. remote battery-powered sensors, handheld instrumentation, consumer equipment, hazard detection (for example, smoke, fire, and gas), and patient monitors can benefit from the features of the ad8505/ad8506/ad8508 amplifiers. the ad8505/ad8506/ad8508 are specified for both the industrial temperature range of ?40c to +85c and the extended industrial temperature range of ?40c to +125c. the ad8505 single ampli- fier is available in a tiny 5-lead sot-23 and a 6-ball wlcsp packages. the ad8506 dual amplifier is available in 8-lead msop and 8-ball wlcsp packages. the ad8508 quad amplifier is available in 14-lead tssop and 14-ball wlcsp packages. the ad8505/ad8506/ad8508 are members of a growing series of zero crossover distortion op amps offered by analog devices, inc., including the ada4505-1/ada4505-2/ada4505-4 , that operate from a single 1.8 v to 5 v supply or from dual 0.9 v to 2.5 v power supplies. pin configurations out 1 +in 3 v? 2 v+ 5 ?in 4 ad8505 top view (not to scale) 06900-051 06900-100 out v+ v? +in ?in top view (ball side down) not to scale a1 a2 b1 b2 c1 c2 ball a1 indicator nc ad8505 nc = no connect figure 1. 5-lead sot-23 (rj-5) figure 2. 6-ball wlcsp (cb-6-7) out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ad8506 top view (not to scale) 06900-002 top view (ball side down) not to scale ball a1 corner a1 a2 a3 b1 b3 c1 c2 c3 ad8506 +in b v? +in a ?in b ?in a out b v+ out a 06900-001 figure 3. 8-lead msop (rm-8) figure 4. 8-ball wlcsp (cb-8-2) out a 1 ?in a 2 +in a 3 v+ 4 out d ?in d +in d v? 14 13 12 11 +in b 5 ?in b 6 out b 7 +in c ?in c out c 10 9 8 06900-045 ad8508 top view (not to scale) top view (ball side down) not to scale 06900-104 a1 b1 c1 d1 e1 a2 b2 c3 d2 e2 a3 b3 d3 e3 outd outa ?ina ?ind v? +ina +ind +inb +inc v+ ?inb ?inc outc ad8508 outb ball a1 corner figure 5. 14-lead tssop (ru-14) fi gure 6. 14-ball wlcsp (cb-14-1)
ad8505/ad8506/ad8508 rev. e | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics1.8 v operation ............................ 3 electrical characteristics5 v operation................................ 4 absolute maximum ratings ............................................................ 5 thermal resistance ...................................................................... 5 esd caution...................................................................................5 typical performance characteristics ..............................................6 theory of operation ...................................................................... 13 applications information .............................................................. 15 pulse oximeter current source ............................................... 15 four-pole, low-pass butterworth filter for glucose monitor ........................................................................................ 16 outline dimensions ....................................................................... 17 ordering guide .......................................................................... 20 revision history 5 /10rev. d to rev. e added ad8505, 6-ball wlcsp package ......................... universal changes to large-signal voltage gain parameter (table 1) ....... 4 changes to large-signal voltage gain parameter (table 2) ....... 5 changes to table 4 ............................................................................ 6 updated outline dimensions ....................................................... 19 changes to ordering guide .......................................................... 21 10/09rev. c to rev. d added ad8505, 5-lead sot-23 package ....................... universal changes to general description, added figure 1 ....................... 1 moved electrical characteristics1.8 v operation section, changes to supply current per amplifier parameter, table 1 ..... 3 moved electrical characteristics5 v operation section, changes to supply current per amplifier parameter, table 2 ..... 4 changes to thermal resistance section and table 4 ................... 5 changes to figure 20 and figure 23 ............................................... 8 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 17 3/09rev. b to rev. c added ad8508, 14-ball wlcsp package ....................... universal updated outline dimensions ....................................................... 17 changes to ordering guide .......................................................... 18 10/08rev. a to rev. b added wlcsp package ..................................................... universal added figure 2; renumbered sequentially .................................. 1 added input resistance parameter ................................................ 3 changes to input capacitance differential mode parameter symbol and input capacitance common mode parameter symbol ................................................................................................ 3 added input resistance parameter ................................................ 4 changes to input capacitance differential mode parameter symbol and input capacitance common mode parameter symbol ................................................................................................ 4 changes to table 4 ............................................................................. 5 changes to figure 46 ...................................................................... 16 updated outline dimensions ....................................................... 17 added figure 49 ............................................................................. 17 changes to ordering guide .......................................................... 18 7/08rev. 0 to rev. a added ad8508 ................................................................... universal added tssop package ...................................................... universal changes to features section and general description section .. 1 added figure 2; renumbered sequentially ................................... 1 changed electrical characteristics heading to electrical characteristics5 v operation ...................................................... 3 changes to table 1 ............................................................................. 3 added electrical characteristics1.8 v operation heading ..... 4 changes to table 2 ............................................................................. 4 changes to table 3, thermal resistance section, and table 4 .... 5 added t a = 25c condition to typical performance characteristics section ..................................................................... 6 changes to figure 3, figure 4, figure 6, and figure 7 .................. 6 added figure 11 and figure 14 ....................................................... 7 changes to figure 17 through figure 20....................................... 8 changes to figure 21 through figure 26....................................... 9 changes to figure 27, figure 28, figure 30, and figure 31....... 10 changes to figure 34, figure 37, and figure 38 ......................... 11 added figure 39 and figure 40 .................................................... 12 added theory of operation section, figure 41, and figure 42 .......................................................................................... 13 added figure 43 and figure 44 .................................................... 14 added applications information section and figure 45 .......... 15 added figure 46 ............................................................................. 16 updated outline dimensions ....................................................... 17 added figure 48 ............................................................................. 17 changes to ordering guide .......................................................... 17 11/07revision 0: initial version
ad8505/ad8506/ad8508 rev. e | page 3 of 20 specifications electrical characteristics1.8 v operation v sy = 1.8 v, v cm = v sy /2, t a = 25c, r l = 100 k to gnd, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0 v v cm 1.8 v 0.5 2.5 mv ?40c t a +125c 3.5 mv input bias current i b 1 10 pa ?40c t a +85c 100 pa ?40c t a +125c 600 pa input offset current i os 0.5 5 pa ?40c t a +85c 50 pa ?40c t a +125c 100 pa input voltage range ?40c t a +125c 0 1.8 v common-mode rejection ratio cmrr 0 v v cm 1.8 v 85 100 db ?40c t a +85c 85 db ?40c t a +125c 80 db large-signal voltage gain a vo 0.05 v v out 1.75 v, r l = 100 k to v cm 95 115 db ?40c t a +125c 95 db offset voltage drift v os / t ?40c t a +125c 2.5 v/c input resistance r in 220 g input capacitance, differential mode c indm 3 pf input capacitance, common mode c incm 4.2 pf output characteristics output voltage high v oh r l = 100 k to gnd 1.78 1.79 v ?40c t a +125c 1.78 v r l = 10 k to gnd 1.65 1.75 v ?40c t a +125c 1.65 v output voltage low v ol r l = 100 k to v sy 2 5 mv ?40c t a +125c 5 mv r l = 10 k to v sy 12 25 mv ?40c t a +125c 25 mv short-circuit limit i sc v out = v sy or gnd 4.5 ma power supply power supply rejection ratio psrr v sy = 1.8 v to 5 v 100 110 db ?40c t a +85c 100 db ?40c t a +125c 95 db supply current per amplifier i sy ad8506/ad8508 v out = v sy /2 16.5 20 a ?40c t a +125c 25 a ad8505 v out = v sy /2 16.5 24 a ?40c t a +125c 27.5 a dynamic performance slew rate sr r l = 100 k, c l = 10 pf, g = 1 13 mv/s gain bandwidth product gbp r l = 1 m, c l = 20 pf, g = 1 95 khz phase margin m r l = 1 m, c l = 20 pf, g = 1 60 degrees noise performance voltage noise e n p-p f = 0.1 hz to 10 hz 2.8 v p-p voltage noise density e n f = 1 khz 45 nv/hz current noise density i n f = 1 khz 15 fa/hz
ad8505/ad8506/ad8508 rev. e | page 4 of 20 electrical characteristics5 v operation v sy = 5 v, v cm = v sy /2, t a = 25c, r l = 100 k to gnd, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0 v v cm 5 v 0.5 2.5 mv ?40c t a +125c 3.5 mv input bias current i b 1 10 pa ?40c t a +85c 100 pa ?40c t a +125c 600 pa input offset current i os 0.5 5 pa ?40c t a +85c 50 pa ?40c t a +125c 130 pa input voltage range ?40c t a +125c 0 5 v common-mode rejection ratio cmrr 0 v v cm 5 v 90 105 db ?40c t a +85c 90 db ?40c t a +125c 85 db large-signal voltage gain a vo 0.05 v v out 4.95 v, r l = 100 k to v cm 105 120 db ?40c t a +125c 100 db offset voltage drift v os / t ?40c t a +125c 2 v/c input resistance r in 220 g input capacitance, differential mode c indm 3 pf input capacitance, common mode c incm 4.2 pf output characteristics output voltage high v oh r l = 100 k to gnd 4.98 4.99 v ?40c t a +125c 4.98 v r l = 10 k to gnd 4.9 4.95 v ?40c t a +125c 4.9 v output voltage low v ol r l = 100 k to v sy 2 5 mv ?40c t a +125c 5 mv r l = 10 k to v sy 10 25 mv ?40c t a +125c 30 mv short-circuit limit i sc v out = v sy or gnd 45 ma power supply power supply rejection ratio psrr v sy = 1.8 v to 5 v 100 110 db ?40c t a +85c 100 db ?40c t a +125c 95 db supply current per amplifier i sy ad8506/ad8508 v out = v sy /2 15 20 a ?40c t a +125c 25 a ad8505 ?40c t a +125c 25.5 a dynamic performance slew rate sr r l = 100 k, c l = 10 pf, g = 1 13 mv/s gain bandwidth product gbp r l = 1 m, c l = 20 pf, g = 1 95 khz phase margin m r l = 1 m, c l = 20 pf, g = 1 60 degrees noise performance voltage noise e n p-p f = 0.1 hz to 10 hz 2.8 v p-p voltage noise density e n f = 1 khz 45 nv/hz current noise density i n f = 1 khz 15 fa/hz
ad8505/ad8506/ad8508 rev. e | page 5 of 20 absolute maximum ratings table 3. parameter rating supply voltage 5.5 v input voltage v sy 0.1 v input current 1 10 ma differential input voltage 2 v sy output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c 1 input pins have clamp diodes to the supply pins. the input current should be limited to 10 ma or less whenever the input signal exceeds the power supply rail by 0.5 v. 2 the differential input voltage is limited to 5 v or the supply voltage, whichever is less. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages with its exposed paddle soldered to a pad, if applicable. table 4 shows simulated thermal values for a 4-layer (2s2p) jedec standard thermal test board, unless otherwise specified. table 4. package type ja jc unit 5-lead sot-23 (rj-5) 190 92 c/w 6-ball wlcsp (cb-6-7) 105 n/a c/w 8-lead msop (rm-8) 142 45 c/w 8-ball wlcsp (cb-8-2) 82 n/a c/w 14-lead tssop (ru-14) 112 35 c/w 14-ball wlcsp (cb-14-1) 64 n/a c/w esd caution
ad8505/ad8506/ad8508 rev. e | page 6 of 20 typical performance characteristics t a = 25c, unless otherwise noted. 250 200 150 100 50 0 ?4 ?1 ?3 0 ?2 1 2 3 4 number of amplifiers v os (mv) v sy = 1.8v v cm = v sy /2 06900-003 figure 7. input offset voltage distribution 16 14 12 10 8 6 4 2 0 012345678910111213 number of amplifiers tcv os (v/c) v sy = 1.8v ?40c t a +125c 06900-004 figure 8. input offset voltage drift distribution 2000 1500 1000 500 0 ?500 ?1000 ?1500 ?2000 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v os (v) v cm (v) v sy = 1.8v 06900-005 figure 9. input offset voltage vs. input common-mode voltage 250 200 150 100 50 0 ?4 ?1 ?3 0 ?2 1 2 3 4 number of amplifiers v os (mv) 06900-006 v sy = 5v v cm = v sy /2 figure 10. input offset voltage distribution 12 10 8 6 4 2 0 012345678910111213 number of amplifiers tcv os (v/c) v sy = 5v ?40c t a +125c 06900-007 figure 11. input offset voltage drift distribution 2000 1500 1000 500 0 ?500 ?1000 ?1500 ?2000 012345 v os (v) v cm (v) v sy = 5v 06900-008 figure 12. input offset voltage vs. input common-mode voltage
ad8505/ad8506/ad8508 rev. e | page 7 of 20 t a = 25c, unless otherwise noted. ?115 ?140 ?135 ?130 ?125 ?120 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v os (v) v cm (v) 06900-037 v sy = 1.8v figure 13. input offset voltage vs. input common-mode voltage 600 550 500 450 400 350 300 250 200 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 i b (pa) v cm (v) v sy = 1.8v 06900-009 figure 14. input bias current vs. input common-mode voltage at 125c 1000 100 10 1 0.1 0.01 25 35 45 55 65 75 85 95 105 115 125 temperature (c) i b (pa) 06900-018 v sy = 1.8v v cm = v sy /2 figure 15. input bias current vs. temperature ?120 ?150 ?140 ?145 ?135 ?130 ?125 05 4 3 2 1 v os (v) v cm (v) 06900-038 v sy = 5v figure 16. input offset voltage vs. input common-mode voltage 600 550 500 450 400 350 300 250 200 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i b (pa) v cm (v) v sy = 5v 06900-012 figure 17. input bias current vs. input common-mode voltage at 125c 1000 100 10 1 0.1 0.01 25 35 45 55 65 75 85 95 105 115 125 temperature (c) i b (pa) 06900-019 v sy = 5v v cm = v sy /2 figure 18. input bias current vs. temperature
ad8505/ad8506/ad8508 rev. e | page 8 of 20 t a = 25c, unless otherwise noted. load current (ma) output voltage to supply rail (mv) 10k 0.1 0.001 10 0.01 0.1 1 1k 100 10 1 v sy = 1.8v v dd ? v oh v ol 0 6900-010 figure 19. output voltage to supply rail vs. load current temperature (c) output voltage to supply rail (mv) 14 12 10 8 6 4 2 0 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 v sy = 1.8v 06900-011 v dd ? v oh @ r l = 10k ? v ol @ r l = 10k ? v dd ? v oh @ r l = 100k ? v ol @ r l = 100k ? figure 20. output voltage to supply rail vs. temperature 90 0 10 20 30 40 50 60 70 80 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 total supply current (a) supply voltage (v) 06900-052 ad8508 ad8506 ad8505 v cm = v sy /2 figure 21. total supply cu rrent vs. supply voltage load current (ma) output voltage to supply rail (mv) 10k 0.01 0.1 0.001 10 100 0.01 0.1 1 1k 100 10 1 v sy = 5v 0 6900-013 v dd ? v oh v ol figure 22. output voltage to supply rail vs. load current temperature (c) output voltage to supply rail (mv) 14 12 10 8 6 4 2 0 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 v sy = 5v 06900-014 v dd ? v oh @ r l = 10k ? v ol @ r l = 10k ? v dd ? v oh @ r l = 100k ? v ol @ r l = 100k ? figure 23. output voltage to supply rail vs. temperature 90 0 10 20 30 40 50 60 70 80 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 total supply current (a) temperature (c) 06900-053 ad8508, 1.8v ad8508, 5v ad8506, 1.8v ad8606, 5v ad8505, 1.8v ad8505, 5v v cm = v sy /2 figure 24. total supply current vs. temperature
ad8505/ad8506/ad8508 rev. e | page 9 of 20 t a = 25c, unless otherwise noted. 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 ?120 ?100 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 ?120 ?100 100 1k 10k 100k 1m frequency (hz) open-loop gain (db) phase (degrees) 06900-022 gain phase gain, c l = 0pf phase, c l = 0pf gain, c l = 50pf phase, c l = 50pf gain, c l = 100pf phase, c l = 100pf v sy = 1.8v figure 25. open-loop gain and phase vs. frequency frequency (hz) closed-loop gain (db) 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 100 1m 1k 10k 100k v sy = 1.8v g= ?1 g= ?10 g= ?100 0 6900-017 figure 26. closed-loop gain vs. frequency 10k 1k 100 10 1 0.1 10 100 1k 10k 100k 1m frequency (hz) z out ( ? ) 06900-028 v sy = 1.8v g = 100 g = 10 g = 1 figure 27. z out vs. frequency 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 ?100 120 100 80 60 40 20 0 ?20 ?40 ?60 ?80 ?100 100 1k 10k 100k 1m frequency (hz) open-loop gain (db) phase (degrees) 06900-025 gain phase gain, c l = 0pf phase, c l = 0pf gain, c l = 50pf phase, c l = 50pf gain, c l = 100pf phase, c l = 100pf v sy = 5v figure 28. open-loop gain and phase vs. frequency frequency (hz) closed-loop gain (db) 50 40 30 20 10 0 ?10 ?20 ?30 ?40 ?50 100 1m 1k 10k 100k v sy = 5v 0 6900-020 g= ?1 g= ?10 g= ?100 figure 29. closed-loop gain vs. frequency 10k 1k 100 10 1 0.1 0.01 10 100 1k 10k 100k 1m frequency (hz) z out ( ? ) 06900-031 v sy = 5v g = 100 g = 10 g = 1 figure 30. z out vs. frequency
ad8505/ad8506/ad8508 rev. e | page 10 of 20 t a = 25c, unless otherwise noted. 100 90 80 70 60 50 40 10 100 1k 10k 100k 1m frequency (hz) cmrr (db) 06900-029 v sy = 1.8v figure 31. cmrr vs. frequency 06900-023 100 0 10 20 30 40 50 60 70 80 90 10 100 1k 10k 100k 1m psrr (db) frequency (hz) psrr+ v sy = 1.8v psrr? figure 32. psrr vs. frequency load capacitance (pf) overshoot (%) 80 70 60 50 40 30 20 10 0 10 600 100 v sy = 1.8v r l = 100k ? 06900-027 ?overshoot +overshoot figure 33. small-signal overshoot vs. load capacitance 100 90 80 70 60 50 40 10 100 1k 10k 100k 1m frequency (hz) cmrr (db) 06900-032 v sy = 5v figure 34. cmrr vs. frequency 06900-026 100 0 10 20 30 40 50 60 70 80 90 10 100 1k 10k 100k 1m psrr (db) frequency (hz) psrr+ v sy = 5v psrr? figure 35. psrr vs. frequency load capacitance (pf) overshoot (%) 80 70 60 50 40 30 20 10 0 10 600 100 06900-030 ?overshoot +overshoot v sy = 5v r l = 100k ? figure 36. small-signal overshoot vs. load capacitance
ad8505/ad8506/ad8508 rev. e | page 11 of 20 t a = 25c, unless otherwise noted. 06900-033 voltage (500mv/div) time (100s/div) v sy = 1.8v r l = 100k ? c l = 200pf g = 1 figure 37. large-signal transient response 06900-036 voltage (5mv/div) time (100s/div) v sy = 1.8v r l = 100k ? c l = 200pf g = 1 figure 38. small-signal transient response 06900-034 input voltage noise (0.5v/div) time (4s/div) v sy = 1.8v and 5v 2.78v p-p figure 39. input voltage noise 0.1 hz to 10 hz 06900-035 voltage (1v/div) time (100s/div) v sy = 5v r l = 100k ? c l = 200pf g = 1 figure 40. large-signal transient response 06900-046 voltage (5mv/div) time (100s/div) v sy = 5v r l = 100k ? c l = 200pf g = 1 figure 41. small-signal transient response 1k 100 10 1 1 10 100 1k 10k frequency (hz) voltage noise density (nv/ hz) 06900-047 v sy = 1.8v and 5v figure 42. voltage noise density vs. frequency
ad8505/ad8506/ad8508 rev. e | page 12 of 20 t a = 25c, unless otherwise noted. ? 40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 100 1k 10k 100k frequency (hz) channel separation (db) 06900-049 v sy = 1.8v v in = 1.5v p-p 100k ? 10k ? figure 43. channel separation vs. frequency ? 40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 100 1k 10k 100k frequency (hz) channel separation (db) 06900-048 v sy = 5v v in = 4v p-p 100k ? 10k ? figure 44. channel separation vs. frequency
ad8505/ad8506/ad8508 rev. e | page 13 of 20 theory of operation the ad8505/ad8506/ad8508 are unity-gain, stable, cmos, rail- to-rail input/output operational amplifiers designed to optimize performance in current consumption, psrr, cmrr, and zero crossover distortion, all embedded in a small package. the typical offset voltage is 500 v, with a low peak-to-peak voltage noise of 2.8 v from 0.1 hz to 10 hz and a voltage noise density of 45 nv/hz at 1 khz. the ad8505/ad8506/ad8508 amplifiers are designed to solve two key problems in low voltage battery-powered applications: the battery voltage decrease over time and the rail-to-rail input stage distortion. in battery-powered applications, the supply voltage available to the ic is the voltage of the battery. unfortunately, the voltage of a battery decreases as it discharges itself through the load. this voltage drop over the lifetime of the battery causes an error in the output of the op amps. some applications requiring precision measurements during the entire lifetime of the battery use voltage regulators to power up the op amps as a solution. if a design uses standard battery cells, the op amps experience a supply voltage change from roughly 3.2 v to 1.8 v during the lifetime of the battery. this means that for a psrr of 70 db minimum in a typical op amp, the input-referred offset error is approximately 440 v. if the same application uses the ad 8505/ad8506/ ad8508 amplifiers with a 100 db minimum psrr, the error is only 14 v. it is possible to calibrate out this error or to use an external voltage regulator to power the op amp, but these solutions can increase system cost and complexity. the ad8505/ad8506/ ad8508 amplifiers solve the impasse with no additional cost or error-nullifying circuitry. the second problem with battery-powered applications is the distortion caused by the standard rail-to-rail input stage. using a cmos non-rail-to-rail input stage (that is, a single differential pair) limits the input voltage to approximately one v gs (gate- source voltage) away from one of the supply lines. because v gs for normal operation is commonly over 1 v, a single differential pair input stage op amp greatly restricts the allowable input voltage range when using a low supply voltage. this limitation restricts the number of applications where the non-rail-to-rail input op amp was originally intended to be used. to solve this problem, a dual differential pair input stage is usually implemented (see figure 45 ); however, this technique has its own drawbacks. one differential pair amplifies the input signal when the common- mode voltage is on the high end, whereas the other pair amplifies the input signal when the common-mode voltage is on the low end. this method also requires control circuitry to operate the two differential pairs appropriately. unfortunately, this topology leads to a very noticeable and undesirable problem: if the signal level moves through the range where one input stage turns off and the other one turns on, noticeable distortion occurs (see figure 46 ). 06900-039 i b i b v in? v in+ v ss v dd q2 q3 q1 q4 v bias figure 45. a typical dual differential pair input stage op amp (dual pmos q1 and q2 transistors form the lower end of the input voltage range, whereas dual nmos q3 and q4 compose the upper end) v cm (v) v os (v) 0 ?300 ?100 100 300 1.5 3.5 5.0 1.0 0.5 2.5 4.54.0 3.0 2.0 ?200 ?150 ?250 ?50 0 50 150 200 250 06900-040 v sy = 5v t a = 25c figure 46. typical input offset voltage vs. common-mode voltage response in a dual differential pair input stage op amp (powered by 5 v supply; results of approximately 1 00 units per graph are displayed) this distortion forces the designer to devise impractical ways to avoid the crossover distortion areas, therefore narrowing the common-mode dynamic range of the operational amplifier. the ad8505/ad8506/ad8508 amplifiers solve this crossover dis- tortion problem by using an on-chip charge pump to power the input differential pair. the charge pump creates a supply voltage higher than the voltage of the battery, allowing the input stage to handle a wide range of input signal voltages without using a second differential pair. with this solution, the input voltage can vary from one supply extreme to the other with no distortion, thereby restoring the full common-mode dynamic range of the op amp.
ad8505/ad8506/ad8508 rev. e | page 14 of 20 the charge pump has been carefully designed so that switching noise components at any frequency, both within and beyond the amplifier bandwidth, are much lower than the thermal noise floor. therefore, the spurious-free dynamic range (sfdr) is limited only by the input signal and the thermal or flicker noise. there is no intermodulation between the input signal and the switching noise. figure 47 displays a typical front-end section of an operational amplifier with an on-chip charge pump. 06900-041 q2 q1 v pp v bias +in ?in out cascode stage and rail-to-rail output stage v dd v ss v pp = positive pumped voltage = v dd + 1.8 v figure 47. typical front-end section of an op amp with embedded charge pump figure 48 , the input offset voltage vs. input common-mode voltage response, shows the typical response of 12 devices. figure 48 is expanded to make it easier to compare with figure 46 , the typical input offset voltage vs. common-mode voltage response in a dual differential pair input stage op amp. v cm (v) v os (v) 0 ?300 ?100 100 300 1.5 3.5 5.0 1.00.5 2.5 4.54.0 3.0 2.0 ?200 ?150 ?250 ?50 0 50 150 200 250 06900-042 v sy = 5v, t a = 25c figure 48. input offset voltage vs. input common-mode voltage response (powered by a 5 v supply; results of 12 units are displayed) this solution improves the cmrr performance tremendously. for instance, if the input varies from rail to rail on a 2.5 v supply rail, using a part with a cmrr of 70 db minimum, an input-referred error of 790 v is introduced. another part with a cmrr of 52 db minimum generates a 6.3 mv error. the ad8505/ad8506/ad8508 cmrr of 90 db minimum causes only a 79 v error. as with the psrr error, there are complex ways to minimize this error, but the ad8505/ad8506/ad8508 amplifiers solve this problem without incurring unnecessary circuitry complexity or increased cost.
ad8505/ad8506/ad8508 rev. e | page 15 of 20 applications information pulse oximeter current source a pulse oximeter is a noninvasive medical device used for con- tinuously measuring the percentage of hemoglobin (hb) saturated with oxygen and the pulse rate of a patient. hemoglobin that is carrying oxygen (oxyhemoglobin) absorbs light in the infrared (ir) region of the spectrum; hemoglobin that is not carrying oxygen (deoxyhemoglobin) absorb s visible red (r) light. in pulse oximetry, a clip containing two leds (sometimes more, depending on the complexity of the measurement algorithm) and the light sensor (photodiode) is placed on the finger or earlobe of the patient. one led emits red light (600 nm to 700 nm) and the other emits light in the near ir (800 nm to 900 nm) region. the clip is connected by a cable to a processor unit. the leds are rapidly and sequentially excited by two current sources (one for each led), whose dc levels depend on the led being driven, based on manufacturer requirements, and the detector is synchro- nized to capture the light from each led as it is transmitted through the tissue. an example design of a dc current source driving the red and infrared leds is shown in figure 49 . these dc current sources allow 62.5 ma and 101 ma to flow through the red and infrared leds, respectively. first, to prolong battery life, the leds are driven only when needed. one-third of the adg733 spdt analog switch is used to disconnect or connect the 1.25 v voltage reference from or to each current circuit. when driving the leds, the adr1581 1.25 v voltage reference is buffered by half of the ad8506; the presence of this voltage on the noninverting input forces the output of the op amp (due to the negative feedback) to maintain a level that causes its inverting input to track the noninverting pin. therefore, the 1.25 v appears in parallel with the 20 r1 or 12.4 r5 current source resistor, creating the flow of 62.5 ma or 101 ma current through the red or infrared led as the output of the op amp turns on the q1 or q2 n-mosfet irlms2002. the maximum total quiescent currents for the ad8506 (that is, half of the ad8506), adr1581 , and adg733 are 25 a, 70 a, and 1 a, respectively, resulting in a total of 96 a current con- sumption (480 w power consumption) per circuit, which is good for a system powered by a battery. if the accuracy and temperature drift of the total design need to be improved, then a more accurate and low temperature coefficient drift voltage reference and current source resistor should be utilized. c3 and c4 are used to improve stabilization of u1; r3 and r7 are used to provide some current limit into the u1 inverting pin; and r2 and r6 are used to slow down the rise time of the n-mosfet when it turns on. these elements may not be needed, or some bench adjustments may be required. 06900-043 8 4 6 7 5 c1 0.1f +5v c3 22pf r2 22? r3 1k? v out1 u1 1/2 ad8506 62.5ma connect to red led r1 20? 0.1% 1/4w min red current source 8 4 2 1 3 +5v c4 22pf r6 22 ? r7 1k? v out2 101ma connect to infrared led r5 12.4 ? 0.1% 1/2w min infrared current source q2 irlms2002 q1 irlms2002 s1a s1b d1 s2a s2b d2 s3a s3b d3 gnd a2 a1 a0 en v ss v dd i_bit2 i_bit1 i_bit0 i_ena r4 53.6k ? u3 adr1581 c2 0.1f +5 v u2 adg733 v ref = 1.25v +5v 14 15 4 16 8 12 13 2 1 5 3 9 10 11 6 7 v+ v? u1 1/2 ad8506 v+ v? figure 49. pulse oximeter red and infrared current sources using the ad8506 as a buffer to the voltage reference device
ad8505/ad8506/ad8508 rev. e | page 16 of 20 four-pole, low-pass butterworth filter for glucose monitor there are several methods of glucose monitoring: spectroscopic absorption of infrared light in the 2 m to 2.5 m range, reflec- tance spectrophotometry, and the amperometric type using electrochemical strips with glucose oxidase enzymes. the amperometric type generally uses three electrodes: a reference electrode, a control electrode, and a working electrode. although this is a well established and widely used technique, signal-to-noise ratio and repeatability can be improved using the ad8505/ ad8506/ad8508 amplifiers with their low peak-to-peak voltage noise of 2.8 v from 0.1 hz to 10 hz and voltage noise density of 45 nv/hz at 1 khz. another consideration is operation from a 3.3 v battery. glucose signal currents are usually less than 3 a full scale; therefore, the i-to-v converter requires low input bias current. the ad8505/ad8506/ad8508 are excellent choices because these amplifiers provide 1 pa typical and 10 pa maximum of input bias current at ambient temperature. a low-pass filter with a cutoff frequency of 80 hz to 100 hz is desirable in a glucose meter device to remove extraneous noise; this can be a simple two-pole or four-pole butterworth filter. low power op amps with bandwidths of 50 khz to 500 khz should be adequate. the ad8505/ad8506/ad8508 amplifiers with their 95 khz gbp and 15 a typical current consumption meet these requirements. a circuit design of a four-pole butterworth filter (preceded by a one-pole, low-pass filter) is shown in figure 50 . with a 3.3 v battery, the total power consumption of this design is 297 w typical at ambient temperature. 06900-044 8 4 2 1 3 +3.3v v out c4 0.1f c5 0.047f r5 22.6k ? r4 22.6k ? 8 4 6 7 5 r2 22.6k ? +3.3v c2 0.1f c3 0.047f r3 22.6k ? 8 4 2 1 3 +3.3v duplicate of circuit above control working reference r1 5m ? c1 1000pf u2 1/2 ad8506 u1 1/2 ad8506 u1 1/2 ad8506 v+ v? v+ v? v+ v? figure 50. a four-pole butterworth filter that can be used in a glucose meter
ad8505/ad8506/ad8508 rev. e | page 17 of 20 outline dimensions compliant to jedec standards mo-178-aa 121608-a 10 5 0 seating plane 1.90 bsc 0.95 bsc 0.20 bsc 5 123 4 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.20 max 0.08 min 0.50 max 0.35 min 0.55 0.45 0.35 figure 51. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters 081709-a 0.40 bsc 0.80 bsc 1.425 1.385 1.345 0.945 0.905 0.865 seating plane 0.645 0.600 0.555 0.415 0.400 0.385 0.40 bsc a 12 b c top view (ball side down) bottom view (ball side up) ball a1 identifier 0.05 nom coplanarity 0.230 0.200 0.170 0.287 0.267 0.247 figure 52. 6-ball wafer level chip scale package [wlcsp] (cb-6-7) dimensions shown in millimeters
ad8505/ad8506/ad8508 rev. e | page 18 of 20 compliant to jedec standards mo-187-aa 100709-b 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 53. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 011008-b seating plane 0.50 ball pitch 1.460 1.420 sq 1.380 0.270 0.240 0.210 0.380 0.355 0.330 0.340 0.320 0.300 0.650 0.595 0.540 bottom view (ball side up) top view a 123 b c ball 1 identifier coplanarity 0.075 figure 54. 8-ball wafer level chip scale package [wlcsp] (cb-8-2) dimensions shown in millimeters
ad8505/ad8506/ad8508 rev. e | page 19 of 20 compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 55. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters 061208-a a b c d e 0.650 0.595 0.540 1.50 1.46 1.42 3.00 2.96 2.92 1 2 3 bottom view (ball side up) top view (ball side down) 0.340 0.320 0.300 2.00 bsc ball 1 identifier seating plane 1.00 bsc 0.50 bsc 0.50 bsc 0.25 bsc 0.25 bsc 0.25 bsc 0.25 bsc 0.50 bsc 0.50 bsc 0.380 0.355 0.330 0.270 0.240 0.210 0.10 max coplanarity figure 56. 14-ball wafer level chip scale package [wlcsp] (cb-14-1) dimensions shown in millimeters
ad8505/ad8506/ad8508 rev. e | page 20 of 20 ordering guide model 1 temperature range package description package option branding ad8505arjz-r2 ?40c to +125c 5-lead small outl ine transistor package [sot-23] rj-5 a2e ad8505arjz-r7 ?40c to +125c 5-lead small outl ine transistor package [sot-23] rj-5 a2e ad8505arjz-rl ?40c to +125c 5-lead small outl ine transistor package [sot-23] rj-5 a2e ad8505acbz-r7 ?40c to +125c 6-ball wafer level chip scale package [wlcsp] cb-6-7 a2h ad8505acbz-rl ?40c to +125c 6-ball wafer level chip scale package [wlcsp] cb-6-7 a2h ad8506acbz-reel ?40c to +125c 8-ball wafer level chip scale package [wlcsp] cb-8-2 a1x ad8506acbz-reel7 ?40c to +125c 8-ball wafer level chip scale package [wlcsp] cb-8-2 a1x ad8506armz ?40c to +125c 8-lead mini small outline package [msop] rm-8 a1x ad8506armz-r7 ?40c to +125c 8-lead mini small outline package [msop] rm-8 a1x ad8506armz-reel ?40c to +125c 8-lead mini small outline package [msop] rm-8 a1x AD8508ARUZ ?40c to +125c 14-lead thin shrink small outline package [tssop] ru-14 AD8508ARUZ-reel ?40c to +125c 14-lead thin sh rink small outline package [tssop] ru-14 ad8508acbz-reel ?40c to +125c 14-ball wafer level chip scale package [wlcsp] cb-14-1 a27 ad8508acbz-reel7 ?40c to +125c 14-ball wafer level chip scale package [wlcsp] cb-14-1 a27 1 z = rohs compliant part. ?2007C2010 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06900-0-5/10(e)

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